module string2( input clk, input clr, input [7:0] in, output out ); parameter START = 3'B000, DIGIT = 3'B001, CAL = 3'B010, LEFT_BRACKET = 3'B011, LEFT_DIGIT = 3'B100, LEFT_CAL = 3'B101, ILLEGAL = 3'B110; parameter zero = 48, nine = 57, left = 40, right = 41, mult_ = 42, plus_ = 43; reg [2:0] state; reg num; reg mark; reg left_bracket; reg right_bracket; initialbegin state = START; num = 1'b0; mark = 1'b0; left_bracket = 1'b0; right_bracket = 1'b0; end always @(posedge clk orposedge clr) begin if (clr)begin state = START; num = 1'b0; mark = 1'b0; left_bracket = 1'b0; right_bracket = 1'b0; end elsebegin num = (in >= zero && in <= nine) ? 1 : 0; mark = (in == mult_ || in == plus_) ? 1 : 0; left_bracket = (in == left) ? 1 : 0; right_bracket = (in == right) ? 1 : 0;
case (state) START:begin state = num ? DIGIT: left_bracket ? LEFT_BRACKET: ILLEGAL; end DIGIT:begin state = mark ? CAL: ILLEGAL; end CAL:begin state = left_bracket ? LEFT_BRACKET : num ? DIGIT: ILLEGAL; end LEFT_BRACKET:begin state = num ? LEFT_DIGIT: ILLEGAL; end LEFT_DIGIT:begin state = mark ? LEFT_CAL : right_bracket ? DIGIT: ILLEGAL; end LEFT_CAL:begin state = num ? LEFT_DIGIT : ILLEGAL; end ILLEGAL:begin state = ILLEGAL; end endcase end end